JR0191113 - SOC Design Engineer
Company: HBCU CONNECT, LLC
Location: Santa Clara
Posted on: November 22, 2021
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Employment Type: Full Time
Date Posted: 10/25/2021
Expire Date: 12/24/2021
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Description JR0191113 - SOC Design Engineer
Become a member of one of the largest engineering companies in the
world. Join us to develop new technology that will provide Intel a
competitive advantage in programmable solutions. If you find it
exciting to work in a diverse team that innovates with other Intel
advanced technology groups, with other industry leaders and
academia, then we have your opportunity. The Intel Programmable
Solutions Group (PSG) has been delivering industry leading custom
logic solutions to customers since inventing the world's first
reprogrammable logic device in 1984. To expand the technology that
provides us with advantages in programmable solutions, we are
looking for a phenomenal engineer to join our high-powered team.
The Customer ASIC (Application Spe cific Integrated Circuit)
Solutions team in PSG (Programmable Solutions Group) is looking for
a motivated individual for SoC/ASIC physical design Static Timing
Analysis (STA), Voltage Drop (IR), Reliability Verification (RV) a
nd Power analysis. The candidate will take the RTL, synthesize,
place, route, and perform static timing, IR drop analysis,
reliability verification and power analysis. The candidate will
grow within our supporting team setting, and learn:
- Tool usage of synthesis, place and route, static timing, IR/RV,
power analysis and associated methodology development.
- Analytical skills required to debug complex design specs,
timing constraints, power intent.
- Collaborate, share, and leverage the team to solve some of the
most complex technical challenges. Behavioral traits:
- Problem Solving skills.
- Written/verbal communication skills.
You must possess minimum qualifications to be initially considered
for this position. Preferred qualifications are in addition to the
minimum requirements and are considered a plus factor in
identifying top candidates. Experience listed below would be
obtained through a combination of your school work/classes/research
and/or relevant previous job and/or internship experiences.
Minimum requirements: The candidate must have a Master's degree in
Electrical Engineering, Computer Engineering, Computer Science or a
Minimum of 6+ months of experience in:
- RTL Synthesis.
- Static Timing Analysis.
- VLSI Design Concept. Pr eferred qualifications:
- P ower analysis.
- IR drop analysis.
- RV analysis.
- Automatic Place and Route.
- Verilog. Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the
acquisition of Altera. As part of Intel, PSG will create
market-leading programmable logic devices that deliver a wider
range of capabilities than customers experience today. Combining
Altera's industry-leading FPGA technology and customer support with
Intel's world-class semiconductor manufacturing capabilities will
enable customers to create the next generation of electronic
systems with unmatched performance and power efficiency. PSG takes
pride in creating an energetic and dynamic work environment that is
driven by ingenuity and innovation. We believe the growth and
success of our group is directly linked to the growth and
satisfaction of our employees. That is why PSG is committed to a
work environment that is flexible and collaborative, and allows our
employees to reach their full potential.
All qualified applicants will receive consideration for employment
without regard to race, color, religion, religious creed, sex,
national origin, ancestry, age, physical or mental disability,
medical condition, genetic information, military and veteran
status, marital status, pregnancy, gender, gender expression,
gender identity, sexual orientation, or any other characteristic
protected by local law, regulation, or ordinance. Contact
Information Company Name:Intel
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Keywords: HBCU CONNECT, LLC, Santa Clara , JR0191113 - SOC Design Engineer, Engineering , Santa Clara, California
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