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JR0197587 - Senior Pre-Si Validation Engineer

Company: Intel GmbH
Location: Santa Clara
Posted on: January 10, 2022

Job Description:

Job ID: JR0197587 Job Category: Engineering Primary Location: Santa Clara, CA US Other Locations: US, Colorado, Fort Collins Job Type: Experienced Hire Senior Pre-Si Validation EngineerJob Description
The world is transforming - and so is Intel! Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful!Responsibilities will include but not limited to:

  • Develops pre-silicon functional validation tests to verify system will meet design requirements.
  • Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests.
  • Analyzes and use results to modify testing.In addition to the qualifications listed below, the ideal candidate will also have:
    • Excellent analytical and problem-solving skills
    • Strong verbal/written communication skills
    • Effective team player with continuous learning mindset
    • Willingness to balance multiple tasks

      Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

      Minimum Qualifications:
      Candidate must have a Bachelor's degree in Electrical/Computer Engineering or related disciplines with 4+ years of experience Or a Master's in the same fields with 3+ years of relevant industry experience.
      • Develop environments, infrastructure and have end-to-end ownership of writing, refining and executing test plans to accommodate both full chip and standalone block level verification and debug capabilities using simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design of the microprocessor.
      • Strong background in HDLs and HVL (e.g. System Verilog, OVM, UVM, etc.)
      • Implementation of verification environments that include use of constrained-random stimulus and use of functional coverage
      • IP or SoC development, verification, or integration using Verilog/System Verilog/ Open Verification Methodology (OVM)/Universal Verification Methodology (UVM)
      • Debugging, writing monitors/checkers/reference models / stimulus
        Preferred Qualifications: Experience in:
        • Verification of memory and/or cache coherence protocols and designs
        • Reading and interpreting technical specs and Register Transfer Level (RTL) code
        • Writing System Verilog Assertions (SVA)
        • Using Verdi Coverage plannerInside this Business Group
          IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

          Other Locations

          US, Colorado, Fort Collins
          Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

          Posting Statement

          All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Annual Salary Range for jobs which could be performed in US, Colorado:
          We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

Keywords: Intel GmbH, Santa Clara , JR0197587 - Senior Pre-Si Validation Engineer, Engineering , Santa Clara, California

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