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Design Verification Engineer (1- 3 years Experience)

Company: FLC Technology Group Inc
Location: Santa Clara
Posted on: August 6, 2022

Job Description:

Job Purpose:


The Role

  • Create verification plans for unit level and top level verification
  • Design and implement test benches and verification collateral like functional coverage monitors, UVM checkers & integrate VIP's for common AMBA/ARM Protocol busses.
  • Find bugs/defects in the design by debugging tests and analyzing coverage
  • Create scripts and other automation capabilities to increase productivity of verification engineersSkills/Qualifications:
    • Coding experience in Verilog, System Verilog or VHDL
    • Experience using industry standard logic simulation tools like Questa, VCS or NCSIM
    • Proficiency in scripting using Unix shell, perl or Python and experience in object oriented programming using any high level language
    • Knowledge of basic computer architecture concepts and assembly language (ARM, x86 or equivalent)
    • Good written and verbal communication skills and able to work collaboratively in a team
    • Ability to learn quickly and demonstrate strong problem solving and trouble shooting skills

Keywords: FLC Technology Group Inc, Santa Clara , Design Verification Engineer (1- 3 years Experience), Engineering , Santa Clara, California

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