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Design Verification Engineer

Company: eInfochips (An Arrow Company)
Location: Santa Clara
Posted on: August 7, 2022

Job Description:

Design Verification EngineerLocation: Santa Clara, CA (Remote)
Job details:Responsibilities:--- Must be a quick learner, independent and communicate well. --- Knowledge and hands on experience with Verilog, System Verilog , UVM, debugging waveforms --- Building a testbench for a medium complexity block using System Verilog and UVM --- Writing random tests, directed tests, error tests & performance tests for a block of medium complexity using System Verilog and UVM. --- Developing, maintaining and supporting of the UVM verification environment. --- Debugging tests with design engineers to deliver functionally correct design blocks --- OOPS, randomization, constraints, interfaces --- Writing & analyzing functional coverage, assertions --- Generating and analyzing code coverage & writing waivers
Skills:--- SystemVerilog, UVM expertise--- Excellent Python scripting skills--- PCIe or equivalent protocol experience--- 7 years' experience & above.
eInfochips Inc. is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, sexual orientation, gender identity, national origin, or disability status. Einfochips (Arrow) COVID-19 Vaccination Policy:Einfochips (Arrow) requires employees to provide proof of full COVID-19 vaccination by December 1, 2021, for all positions located in CO and for business units within immixGroup and Zeus. All other employees will be required to identify vaccination status by December 1, 2021.

Keywords: eInfochips (An Arrow Company), Santa Clara , Design Verification Engineer, Engineering , Santa Clara, California

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