FIP Layout Engineer
Company: InterSources Inc.
Location: Santa Clara
Posted on: January 23, 2023
Job Title: FIP Layout Engineer- 5433
Job Location: Burlington, VT
- Working on TSMC 5nm and 3nm projects for the duration of 1
- Looking for experienced layout designers for contract position:
- With strong finfet experience in 5nm or 3nm TSMC.
- With highspeed SerDes or equivalent analog layout
- That can take direction effectively from project layout lead,
layout macro owner, and circuit designers.
- Must be experienced with and use Virtuoso XL for 1to1 schematic
to layout correspondence.
- That works independently once given a set of requirements and
will ask questions when unsure of tradeoff decision.
- That effectively communicates with layout lead, layout macro
owner, and circuit designers of any observed and anticipated
potential issues with the design and communicating them when
Keywords: InterSources Inc., Santa Clara , FIP Layout Engineer, Engineering , Santa Clara, California
Didn't find what you're looking for? Search again!