Senior DFT Engineer

Company: Arrow Electronics
Location: Santa Clara
Posted on: May 21, 2023

Job Description:

Position:
Senior DFT Engineer
Job Description:

Job Description:
Senior DFT engineer with good knowledge on ATPG, JTAG and MBIST.
ATPG pattern generation and test coverage debugging using Mentor ATPG tools.
Scan and OCC chain insertion using Design Compiler.
RTL and gate level DFT verifications for DFT logic.
Must Skills:
Scan (Synopsys-DC), ATPG (Mentor Tool), MBIST, Simulations and Silicon Debug
Good to have:
DFT Architecture, iJTAG and IEEE 1500.
Education:
Bachelor's Degree

Annual Hiring Range/Hourly Rate:

$80,800.00 - $165,000.00

Actual compensation offer to candidate may vary from posted hiring range based upon geographic location, work experience, education, and/or skill level. The pay ratio between base pay and target incentive (if applicable) will be finalized at offer.

Location:
US-CA-California (Remote Employees)

Remote work employees may be required to be present at the closest designated Arrow office for work-related purposes, at the Company's request and sole discretion.
Time Type:
Full time
Job Category:
Engineering Services

EEO Statement:

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy) Associated topics: etch, embedded, firmware, quantum, qubit, rtos, smt, solder joint, ttl, vhdl

Keywords: Arrow Electronics, Santa Clara , Senior DFT Engineer, Engineering , Santa Clara, California