Senior HSIO Validation and Power Management Engineer
Company: NVIDIA Corporation
Location: Santa Clara
Posted on: March 17, 2023
Job Description:
NVIDIA has continuously reinvented itself over two decades. Our
invention of the GPU in 1999 sparked the growth of the PC gaming
market, redefined modern computer graphics, and revolutionized
parallel computing. More recently, GPU deep learning ignited modern
AI - the next era of computing. NVIDIA is a "learning machine" that
constantly evolves by adapting to new opportunities that are hard
to resolve, that only we can seek, and that matter to the world.
This is our life's work, to amplify human inventiveness and
intelligence.NVIDIA silicon solutions group is seeking hardworking
engineers to be part of a post silicon HW team. As a member of this
team, you will dive into next-gen high speed interconnects like
NVLink and C2C to plan and lead post silicon validation. This
position offers the opportunity to have real impact in a dynamic,
technology-focused company impacting product lines ranging from
consumer graphics to self-driving cars and the growing field of
artificial intelligence.What you'll be doing:
- Develop strategies and infrastructure for next gen HSIO bring
up, validation and product integration with a deep understanding of
IO design, specs, use case and topologies. -
- Ensure interoperability with connected devices and system
components in complex interconnect topologies
- Deep dive into technically challenging HSIO bugs and help drive
debug efforts across various teams
- Work on system level power strategies to continue pushing
performance in power constrained systems
- Work closely and proactively with other engineering teams such
as system architects, - mixed signal and design, DGX,
software/firmware, HW/SW QA, operations and AE teams to drive
design, development, debug and release of next generations
products.What we need to see:
- BS or MS degree in EE/CE or equivalent experience
- Minimum 5 years working in post-silicon bringup, IO validation,
and/or power optimization
- Experience with HSIOs like PCIE or USB including understanding
of process/temp/voltage sensitivity on BER
- Experience with system level and interconnect power management
optimizations
- Understanding of electrical tuning/performance/challenges of
HSIOs -
- Understanding of firmware/driver structures and their
interaction with HW.
- Hands-on validation lab experience with silicon bringup, lab
debug and lab tools (oscilloscopes, multimeters, logic
analyzers)
- Strong EE fundamentals, knowledgeable in computer architecture,
high speed interfaces, timing analysis, process variations,
statistical error rates and power analysis.
- Excellent problem solving, teamwork, and interpersonal
skills.
- Background with automation scripting in languages such as Perl,
Python, tcl.
- Experience with LinuxNVIDIA is widely considered to be the
leader of AI computing, and one of the technology world's most
desirable employers. We have some of the most forward-thinking and
talented people in the world working for us. If you're creative and
autonomous, we want to hear from you.NVIDIA is committed to
fostering a diverse work environment and proud to be an equal
opportunity employer. As we highly value diversity in our current
and future employees, we do not discriminate (including in our
hiring and promotion practices) on the basis of race, religion,
color, national origin, gender, gender expression, sexual
orientation, age, marital status, veteran status, disability status
or any other characteristic protected by law.
Keywords: NVIDIA Corporation, Santa Clara , Senior HSIO Validation and Power Management Engineer, Executive , Santa Clara, California
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