IP Tech and DFx Lead
Location: Santa Clara
Posted on: November 22, 2021
Job ID: JR0187043 Job Category: Engineering Primary Location:
Santa Clara, CA US Other Locations: US, Arizona, Phoenix;US,
California, Folsom;US, Oregon, Hillsboro Job Type: Experienced Hire
IP Tech and DFx LeadJob Description
At Intel, we create world-changing technology that improves the
life of every person on the planet. Now, with Intel Foundry
Services, we are enabling our customers to benefit from Intel's
world-class process and packaging technology. At IFS, you'll have
the opportunity to work closely with foundry and the greater
external IP ecosystem to build IP for Intel foundry process nodes.
If you have strong silicon IP technical background and enjoy
customer interaction, this is the position for you. Intel Foundry
Services (IFS) Technology team is looking for candidates with
strong technical skills in ASIC and IP design and methodology to
work with our customers. You will drive IFS IP technology and DFx
strategy.As the IP Tech and DFx Lead, your daily agenda will be
anything but ordinary. On a regular basis, you will be involved
- Technical management of IFS IP development and planning.
- Deep understanding of customer use case and integration
requirements, responsible for developing IP technical
specifications and DFx requirements.
- Responsible for driving IFS IP development programs.
- Work closely with internal IP design team and 3rd party on
defining and developing IP for IFS customers, following industrial
IP development process.
- Lead design review and design sign off to make sure developed
IP meets all target requirements.
- Lead post-Si IP verification effort and make sure test
methodology and results are compliant with standards and
- Support customer DFx strategy, test coverage, IP integration
and post-Si IP validation.
- Responsible for customer IP issue tracking and working with
engineering team to provide prompt feedbacks and solutions.
- Be part of a group of Independent, self-motivated people with
excellent communication skills to excel in fast-paced working
- Drive closure to a wide variety of technical and program
issues.You must possess the below minimum qualifications to be
initially considered for this position. Qualifications listed as
preferred or additional will be considered a plus factor for
The candidate must possess at least one of the 2 following degrees
+ the years of experience determined for each degree in the areas
Bachelor's degree in Electrical/Computer Engineering, Computer
Science, or related field of study with 9 plus years of experience.
Master's Degree in Electrical/Computer Engineering, Computer
Science, or related field of study with 7 years of experience in a
combination of the following skills:
Experience required in:
- ASIC or IP design-related areas.
- IP design lead or manager delivering complex IPs for
- Analog IP design and DFx requirements, including SERDES, LPDDR,
PLL, GPIO, etc.
- IP integration and familiarity with IP integration
- Design knowledge in standard cell library and memory
- Familiar with Intel and/or industrial IP development process
- Broad understanding of IP development life cycle and quality
- Experience with providing technical direction to engineering
teams.Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make
every facet of semiconductor manufacturing state-of-the-art -- from
semiconductor process development and manufacturing, through yield
improvement to packaging, final test and optimization, and world
class Supply Chain and facilities support. Employees in
the--Technology Development and Manufacturing Group--are part of a
worldwide network of design, development, manufacturing, and
assembly/test facilities, all focused on utilizing the power of
Moore's Law to bring smart, connected devices to every person on
US, Arizona, Phoenix;US, California, Folsom;US, Oregon,
All qualified applicants will receive consideration for employment
without regard to race, color, religion, religious creed, sex,
national origin, ancestry, age, physical or mental disability,
medical condition, genetic information, military and veteran
status, marital status, pregnancy, gender, gender expression,
gender identity, sexual orientation, or any other characteristic
protected by local law, regulation, or ordinance.
Keywords: Intel, Santa Clara , IP Tech and DFx Lead, Other , Santa Clara, California
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